Pre-Silicon Power Management Engineer
Core
Pre-silicon emulation debug, development, and validation of complex boot flows, connections, and peripherals in SOC designs to improve system validation quality and coverage before silicon arrival.
Role type
Pre-silicon Power Management Engineer (IC)
Builds
Pre-silicon validation environments and shift-left strategies for AMD SOC and Enterprise products
Domain
Semiconductor / Microprocessor Design
Required skills
Pre-silicon emulation, FPGA, N-1 silicon usage, low-power state validation (S0i3), boot flow debugging, system architecture knowledge, complex problem solving, project delivery
Preferred skills
Shift-left technologies, firmware/hardware dependency debugging, product verification, complex analysis, stakeholder communication, prioritization
Technologies
Verilog, C, C++, assembly, TCL/TK, Python, FPGA, emulation tools
Responsibilities
Work with pre-silicon tools (emulation, FPGA, software models); Contribute to high-priority issue debug; Drive new capabilities for system validation; Lead defining shift-left strategies; Define key metrics for improvements; Collaborate with business units
Seniority
Mid-Senior, hands-on IC
