Emulation Verification Engineer
Core
Design verification engineer focusing on core emulation infrastructure, test plan implementation, and debugging processor cores on emulators.
Role type
Senior IC design verification engineer (emulation)
Builds
End-to-end core emulation infrastructure and hardware emulation builds for AMD Core IP
Domain
Semiconductor / Processor Architecture (x86, ARM)
Required skills
C++, System Verilog, Verilog, UVM, FPGA/emulation platforms (ZeBu, HAPs, Veloce), waveform analysis, distributed compute automation, x86/ARM assembly, Linux/Windows OS knowledge
Preferred skills
Perl, Python, Makefile, shell scripting, UEFI/core-boot knowledge, leadership/mentorship experience
Technologies
ZeBu, HAPs, Veloce, UVM, C++, System Verilog, Verilog, Linux, Windows, x86, ARM
Responsibilities
Define and implement test plans including stimulus and functional coverage; Develop test benches and components in C++; Write monitors and checkers for emulation infrastructure; Debug regression fails and resolve design defects; Run emulator workloads to verify new features; Maintain and improve hardware emulation environment performance; Collaborate with architects, hardware, and firmware engineers on feature verification.
Seniority
Senior, hands-on IC
