Principal Competitive CPU Microarchitecture & Platform Performance Engineer
Core
Build workload-relevant models of future AMD and competitor server platforms before silicon is available to predict, validate, and explain competitive server CPU performance.
Role type
Principal Competitive CPU Microarchitecture & Platform Performance Engineer
Builds
Pre-silicon performance models, comparative architectural analyses, and executive-ready technical narratives for server CPU platforms.
Domain
Semiconductor / CPU Microarchitecture / System Performance
Deliverable
production ML models
Required skills
CPU microarchitecture modeling, out-of-order pipeline analysis, cache/TLB/coherence modeling, hardware performance counter usage, bottleneck decomposition, quantitative data analysis, technical visualization, assumption management, power/perf-watt analysis
Preferred skills
Pre-silicon performance modeling, multi-ISA analysis, memory-intensive workload analysis, power/thermal modeling, clean-room analysis of vendor disclosures
Technologies
Performance counters, microbenchmarks, system telemetry, analytical modeling tools, architecture diagramming
Responsibilities
Develop comparative models of CPU front ends, execution resources, and memory subsystems; Model platform constraints including memory bandwidth, PCIe, CXL, and power limits; Translate incomplete roadmap disclosures into explicit assumptions with confidence levels; Calibrate models using measured silicon and performance counters; Perform bottleneck decomposition to explain workload behavior; Create architecture diagrams and executive-ready content.
Seniority
Principal, hands-on IC with strategy & mentorship
