CareerPlan

Memory PHY Firmware Architect

Santa Clara, CaliforniaFull-time2026-09-08 → 2026-10-22
No visa sponsorship

Core

Designing, developing, debugging, verifying, and validating firmware for memory IPs across AMD SoCs, spanning pre-silicon and post-silicon phases.

Role type

Principal Firmware Architect/Engineer (Memory PHY)

Builds

Firmware for AMD System-on-Chips (SoCs)

Domain

Semiconductor / Memory Interface

Required skills

Memory PHY, C, C++, DDR, LPDDR, firmware development, hardware debugging

Preferred skills

Semiconductor industry experience, technical education in CS/CE/EE, expert-level firmware production

Technologies

C, C++, DDR, LPDDR

Responsibilities

Lead day-to-day firmware development work, Provide consultation to internal and external customers regarding AMD features and programming requirements

Seniority

Principal, hands-on IC with mentorship