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Senior Staff Analog Design Engineer

Santa Clara💼 Full-time🗓 2026-03-19 → 2026-07-31

Core

Designing state-of-the-art In-Memory-Compute engines for AI inference accelerators and high-speed Die-to-Die interfaces using analog-mixed signal integrated circuit design.

Role type

Senior Staff Analog Design Engineer (IC)

Builds

AI Inference Accelerators and High-Speed Die-to-Die Interfaces

Domain

Semiconductor / AI Hardware / Analog-Mixed Signal IC

Deliverable

production ML models

Required skills

high-speed circuit design, Phase Interpolator design, Clocking design, PLL design, schematic capture, Spice simulations, Monte-Carlo simulations, circuit layout, extraction, back-annotated simulations, channel modeling, Matlab

Preferred skills

standard bodies participation

Technologies

Cadence, Synopsys, Matlab

Responsibilities

Design schematic circuits for In-Memory-Compute engines and Die-to-Die interfaces, perform system-level performance analysis, create design test benches for simulation and verification, guide layout engineers on deep sub-micron process nodes (4nm and below), optimize design for low power and yield, build scripts for silicon bring-up and test features.

Seniority

Senior Staff, hands-on IC

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