Senior SoC Design Verification Engineer
Core
Leading verification of complex SoC features and subsystems, driving methodology, ensuring silicon sign-off, and mentoring engineers.
Role type
Senior IC SoC Design Verification Engineer
Builds
Complex System-on-Chip (SoC) architectures and subsystems
Domain
Semiconductor / Hardware Design
Required skills
SoC architecture, SystemVerilog, UVM, RTL debugging, coverage closure, verification planning, cross-functional collaboration, emulation support, mentorship
Preferred skills
X86 SoC DV, VIPs/UVCs/BFMs, regression automation, scripting (Python/Perl/Shell), memory subsystems, security, power management
Technologies
SystemVerilog, UVM, Python, Perl, Shell, VIPs, UVCs, BFMs, Emulation tools
Responsibilities
Own end-to-end verification of key SoC features and system-level scenarios; Develop and execute comprehensive verification plans, testbenches, and regression strategies; Drive functional, code, assertion, and scenario coverage closure; Lead SoC/IP integration verification and sign-off activities; Debug complex RTL, architecture, testbench, and firmware issues; Mentor and technically guide MTS/SDE engineers
Seniority
Senior, hands-on IC with mentorship
