Senior SoC Architect, RAS
Core
Define and drive SoC-level Reliability, Availability, and Serviceability (RAS) hardware architecture for advanced CPUs and SoCs, ensuring system resiliency, observability, and debuggability for datacenters, autonomous vehicles, and edge systems.
Role type
Senior IC SoC Architect (RAS)
Builds
Resilient computing platforms and SoC architectures
Domain
Semiconductor / Hardware Architecture / High-Reliability Computing
Required skills
SoC architecture, RAS mechanisms (fault detection, correction, containment, recovery), RTL implementation support, design verification, silicon validation, SystemC/C++/Python modeling, failure analysis, radiation-aware design
Preferred skills
Space/radiation effects expertise, architectural resiliency techniques (ECC, parity, redundancy, checkpoint/restart), Design for Debug/Test, patenting novel hardware techniques
Technologies
SystemC, C/C++, Python, RTL, SoC, ECC, Parity, Redundancy
Responsibilities
Define RAS architectural requirements across CPUs, interconnects, memory, and IO; Own RAS features from concept to production readiness; Develop error-handling flows and diagnostic observability; Plan verification strategies including fault injection and coverage analysis; Assist in silicon debug and failure analysis; Apply RAS principles to high-reliability environments.
Seniority
Senior, hands-on IC
