Senior Failure Analysis Engineer, Optical Fault Isolation
Core
Drive die-level logic fault localization for advanced semiconductor devices by identifying root causes of silicon failures to accelerate yield improvements.
Role type
Senior IC failure analysis engineer (semiconductor)
Builds
High-yield, high-quality semiconductor chips
Domain
Semiconductor manufacturing / Silicon failure analysis
Required skills
Die-level logic fault localization, ATE testing & debugging (Advantest 93K), DFT basics (Scan, BIST, boundary scan), Root cause analysis, LFI techniques (LVP, EMMI, SDL, OBIRCH), Cross-functional collaboration
Preferred skills
Teradyne Ultraflex plus experience
Technologies
Advantest 93K, Teradyne Ultraflex plus
Responsibilities
Perform complex hands-on failure analysis and root cause identification using physical and electrical fault isolation methodologies; Utilize the Advantest 93K platform to test and characterize DUT and setup required test-looping; Leverage knowledge of DFT basics to interpret test patterns and guide fault isolation strategies; Analyze test results to distinguish between design, fab process, or tester-induced failures; Collaborate with Product Engineering, Test Engineering, and Foundry Engineering teams to resolve yield, performance, and reliability issues
Seniority
Senior, hands-on IC
