ASIC Design Engineer - New College Grad 2026
Core
Implement, document, and deliver high-performance, area, and power-efficient RTL for NVIDIA's leading SoCs and GPUs, focusing on micro-architecture and digital system features.
Role type
ASIC Design Engineer (New College Grad)
Builds
GPU work schedulers, time distribution systems, interrupt controllers, DMA engines, and other IPs for consumer graphics and AI platforms.
Domain
Semiconductor / VLSI / Computer Architecture
Deliverable
production ML models
Required skills
RTL development (Verilog), ASIC design flow (synthesis, timing analysis), micro-architecture, Digital systems, VLSI design, Computer Architecture, Computer Arithmetic
Preferred skills
C/C++, Python, Perl, debugging, arbiters, scheduling, synchronization, bus protocols, interconnect networks, caches
Responsibilities
Analyze architectural trade-offs based on features and system limitations; Collaborate with architects, verification, synthesis, and back-end teams; Architect features to support silicon debug and post-silicon validation.
Seniority
Entry-level (New College Grad 2026)
