CareerPlan

Senior Product Development Engineer

US, CA, Santa ClaraFull-time$136k2026-06-22 → 2026-11-10

Core

Drive bring-up of innovative System-on-Chips (SOCs) and ensure robust test yields from NPI to high volume manufacturing through ATE test strategy, silicon qualification, and failure analysis.

Role type

Senior Product Development Engineer (Silicon Qualification & ATE)

Builds

Integrated circuits (ICs) and System-on-Chips (SOCs) for consumer electronics, automotive, and telecommunications.

Domain

Semiconductor industry, Microelectronics, Analog Mixed-Signal Design

Required skills

ATE test strategy, Silicon qualification, Failure analysis (FA), Root-cause analysis, HTOL/ESD/LU/HTS/TC/HAST stress testing, NPI to MP transition, Wafer-level to package-level testing, Debugging chip-level failures

Preferred skills

Experience with Teradyne and Advantest platforms, Analog mixed-signal design exposure

Technologies

ATE platforms (Teradyne, Advantest), HTOL, ESD/LU, HTS, TC, HAST, DFT, IObist, mbist, scan, functional tests

Responsibilities

Define and drive PDE Silicon characterization plans covering key tests (scan, mbist, IObist, functional) and analog mixed-signal features. Ensure robust test yields are achieved from NPI to high volume manufacturing by debugging yield distractors. Finalize reliability QUAL stress conditions based on product usage (embedded, commercial, industrial, automotive). Drive all aspects of stress testing of silicon from wafer-level to package level. Evaluate, support, and deploy burn-in needs for the product in NPI and MP phases. Analyze and automate aging data from HTOL/pkg. qual/DVS testing and guide the team on debug steps. Drive true failures from reliability evaluation to closure with final FA reports.

Seniority

Senior, hands-on IC