Senior DFT - Silicon Validation Engineer
Core
Drive end-to-end DFT architecture and methodologies to accelerate post-silicon bring-up, characterization, and yield ramp for complex semiconductor chips.
Role type
Senior IC DFT/Silicon Validation Engineer
Builds
Next-generation test strategies for ATE and complex SoC validation
Domain
Semiconductor design and manufacturing (DFT)
Required skills
silicon debug, DFT architecture, ATE test strategy, yield ramp, pre-silicon validation, failure root cause analysis, Perl/Python/Tcl scripting
Preferred skills
high-speed protocols, semiconductor process technology, industry-standard DFT tools
Responsibilities
Collaborate with multi-functional teams to drive silicon validation; define next-generation test strategies for ATE; lead early silicon validation for complex SoC; perform chip validation on ATE; debug test content; analyze silicon behavior under various operating conditions; identify failure root causes; ensure strong production ramp.
Seniority
Senior, hands-on IC
