CareerPlan

Senior System Verification Engineer

US, CA, Santa ClaraFull-time$168k2026-01-09 → 2026-11-10
On-site

Core

Senior System Verification Engineer leading emulation environments and verifying high-speed/low-speed protocols for GPUs, SOCs, Switches, and NICs.

Role type

Senior IC system verification engineer (emulation)

Builds

GPU, SoC, Switch, and NIC emulation environments and verification frameworks

Domain

Semiconductor hardware verification, emulation, high-speed protocols

Required skills

SystemVerilog, Verilog, VHDL, C/C++, UVM, Perl, Python, Zebu emulation, PCIe/CXL/NVLINK/IB/Ethernet protocols, I2C/I3C/SPI/UART, CPU-GPU coherency debugging

Preferred skills

None stated

Technologies

Zebu, C/C++, SystemVerilog, UVM, PCIe, CXL, NVLINK, IB, Ethernet, I2C, I3C, SPI, UART

Responsibilities

Support multiple emulation environments using latest techniques; Bring up GPUs, SOCs, Switch, NIC on emulation and root cause system level test fails; Bring-up and verify High Speed and Low speed protocols; Debug issues related to CPU and GPU Coherency; Lead emulation vendors to debug issues using various tools; Write monitors and checkers that aid debug in HW test issues and FW/SW bring-up

Seniority

Senior, hands-on IC