Lead SMU Validation Engineer - Data Center GPU
Core
Drive SMU hardware and power-management validation for AMD Data Center GPU products across pre-silicon, bring-up, post-silicon enablement, and system-level debug.
Role type
Lead IC validation engineer (SoC power management)
Builds
Next-generation AI and HPC GPU products
Domain
Semiconductor / Data Center GPU
Deliverable
production ML models
Required skills
SMU hardware validation, SoC power-management validation, firmware interactions, system-level debug, validation planning, root-cause analysis, automation development, RTL review, register-level analysis
Preferred skills
Semiconductor validation, silicon bring-up, emulation/simulation/FPGA, Python, C/C++, Linux, lab bring-up
Technologies
Python, C/C++, Linux, RTL, firmware logs, platform tools, standard measurement equipment
Responsibilities
Own SMU hardware validation planning and execution across emulation, ASIC bring-up, post-silicon enablement, regression, and sustaining phases; Develop validation plans for SMU sub-blocks and power-management features; Lead debug triage, root-cause analysis, and issue closure; Partner with architecture, design, firmware, diagnostics, platform, automation, customer engineering, and program teams; Build and improve automation, validation content, debug-analysis scripts, and regression checks; Review RTL, specifications, firmware interfaces, register maps, and validation collateral; Support lab-based and system-level debug; Support customer and sustaining issues; Mentor engineers and improve team validation methodology
Seniority
Senior, hands-on IC with mentorship
