Hardware Engineer (FPGA/ASIC)
Core
Intern role focused on using programming language technology (OCaml/Hardcaml) to improve the design, testing, and validation of hardware designs.
Role type
Hardware Engineering Intern (FPGA/ASIC)
Builds
FPGA and ASIC designs
Domain
Hardware engineering, FPGA, ASIC
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Hardware Description languages (VHDL, Verilog, Chisel, Pymtl), FPGA vendor tools (Vivado, Quartus), ASIC vendor tools (Genus, Innovus), building working hardware projects, OCaml/Hardcaml
Responsibilities
Designing and testing hardware applications from concept to working design, utilizing OCaml & Hardcaml for RTL design and testing/integration
Seniority
Intern
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