Hardware Validation & Debug Engineer - DDR
No visa sponsorship
Core
Validate memory and system interfaces for advanced AI compute platforms under real product conditions.
Role type
Senior IC hardware validation and debug engineer
Builds
Graphcore silicon and platforms
Domain
AI compute hardware
Deliverable
production ML models
Required skills
board bring-up, LPDDR5 memory subsystem validation, PCB/power/signal integrity debugging, DDR training and timing optimization, lab instrumentation (oscilloscopes, BERT, VNA/TDR), root cause analysis
Preferred skills
experience with slow-speed interfaces, margin analysis, eye diagrams, stability validation
Responsibilities
create and execute validation and debug plans, investigate failures, tune memory subsystems, drive root cause analysis, own bring-up activity, turn complex findings into clear actions across hardware and firmware teams
