Debug Lead Engineer
Core
Lead system-level debug and validation for X86 SoCs from pre-silicon emulation to post-silicon bring-up, ensuring feature enablement and resolving critical silicon issues.
Role type
Senior Lead System Engineer (Hardware/Firmware Debug)
Builds
X86 System-on-Chip (SoC) products for AI, data centers, PCs, and embedded systems
Domain
Semiconductor Hardware Engineering / X86 Architecture
Required skills
X86 architecture, Pre-silicon emulation, Post-silicon bring-up, BIOS/Firmware/Software integration, High-speed I/Os (PCIe Gen4+, DDR4/5, USB4), Power Management, Hardware/Firmware debugging, Cross-functional technical leadership
Preferred skills
Scripting (TCL, Python), High-speed board measurement techniques (Oscilloscopes, Logic Analyzers), DV/Silicon Design collaboration
Technologies
X86, PCIe, DDR4/DDR5, USB4, USB PD, Ethernet, Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, TCL, Python
Responsibilities
Assume technical responsibility for SoC feature enablement and system-level flow; Lead pre-silicon feature implementation and coverage planning in emulation; Lead post-silicon bring-up planning and debug of critical silicon issues; Provide inputs to validation teams on functional coverage; Drive issue triage, closure, and milestone quality metrics.
Seniority
Senior, hands-on IC with leadership
