Sr. Emulation Methodology Engineer
Core
Define hardware/software methodologies and tools to accelerate product readiness across RTL validation, debugging, and pre-/post-silicon workflows for next-generation computing products.
Role type
Senior IC emulation methodology engineer
Builds
Scalable emulation and prototyping environments for AMD's AI, data center, PC, gaming, and embedded systems
Domain
Semiconductor hardware engineering and validation
Deliverable
production ML models
Required skills
Emulation/prototyping platforms (Veloce, Palladium, Protium, Zebu, HAPS), CPU/GPU architecture, PCIe/DRAM/Ethernet/AMBA/CXL protocols, RTL design/verification, embedded firmware/BIOS, System Verilog, C++, Perl, Python, transactors, C-DPI, waveform analysis (Verdi, Visualizer), hybrid emulation, ML/AI for workflow automation
Preferred skills
Cross-functional collaboration, strategic thinking, vendor partnership, EDA tool integration
Technologies
Veloce, Palladium, Protium, Zebu, HAPS, System Verilog, C++, Perl, Python, Verdi, Visualizer, PCIe, JTAG, I2C, USB, UART, C-DPI
Responsibilities
Develop and deploy methodologies to optimize emulation environments; Research and integrate new technologies for pre-silicon validation; Partner with vendors to define performance platforms; Integrate verification interfaces (PCIe, memory, UART, JTAG, I2C, USB, Ethernet); Leverage ML/AI to automate emulation workflows; Collaborate with EDA partners on emerging capabilities
Seniority
Senior, hands-on IC
