Software Engineer, ASIC
Core
Build and maintain scalable EDA compute infrastructure, distributed simulation clusters, and high-performance storage systems to accelerate analog and digital chip design and verification for neural implants.
Role type
Senior IC infrastructure engineer (EDA compute & chip design tooling)
Builds
Scalable EDA compute infrastructure, distributed simulation clusters, shared storage for terabyte-scale design data, and build-system tooling for firmware targeting custom ASICs
Domain
Semiconductor hardware design (ASIC) + High-performance computing infrastructure
Deliverable
infrastructure
Required skills
EDA compute environment administration, FlexLM license server management, compiled languages (Rust/Go/C++), high-performance Linux storage (NFS/ZFS/Ceph), systems administration (RHEL/Ubuntu), distributed compute frameworks, bare-metal provisioning, embedded cross-compilation toolchains, multi-cloud/hybrid architecture
Technologies
Rust, Python, Go, Cadence Virtuoso, Cadence Spectre, Terraform, Ansible, Packer, MAAS, Bazel, Nix, Prometheus, ClickHouse, Grafana, Ray, Docker, Kubernetes, AWS, OCI, RHEL, Ubuntu
Responsibilities
Build and maintain scalable EDA compute infrastructure for analog and digital chip design; Develop distributed simulation clusters to accelerate circuit verification; Manage and optimize license infrastructure across multiple EDA vendors; Architect high-performance shared storage for terabyte-scale design data; Develop build-system infrastructure and tooling for firmware targeting custom ASICs; Automate bare-metal server provisioning and lifecycle management for EDA compute fleets
Seniority
Senior, hands-on IC
