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Photonic Design Automation Engineer

Palo Alto, California, United States💼 Full-time💰 $130,000–$130,000🗓 2026-05-06 → 2026-07-31

Core

Own and scale the layout-to-netlist and multi-physics integration flow for a silicon photonics platform to enable reliable photonic IC tape-outs.

Role type

Senior IC photonic design automation engineer

Builds

Production photonic integrated circuits (PICs) for utility-scale quantum computers

Domain

Quantum computing / Silicon photonics / Semiconductor manufacturing

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Photonic IC design, Analog/mixed-signal CAD/EDA, Custom IC flow automation, Python scripting, Layout tools (KLayout, Cadence Virtuoso), EM solvers (Lumerical FDTD/MODE, HFSS, CST, Tidy3D), Circuit simulators (SPICE, INTERCONNECT, Caphe, PhotonForge)

Preferred skills

Quantum computing domain knowledge, Startup environment adaptability

Technologies

KLayout, Cadence Virtuoso, Lumerical FDTD, Lumerical MODE, HFSS, CST, Tidy3D, SPICE, INTERCONNECT, Caphe, PhotonForge, Python

Responsibilities

Define and maintain photonic netlist methodology; Develop and maintain photonic and electronic LVS flows; Generate simulation-ready netlists for circuit/system tools; Interface with other teams to deliver PIC netlist artifacts; Ensure accurate extraction of parasitics (optical, electrical, thermal); Build CI/CD automation pipelines connecting layout tools, EM solvers, and circuit simulators; Develop Python automation for extraction and model generation; Implement regression testing for netlist consistency; Improve reproducibility of design-to-simulation workflows; Collaborate with PDK engineers to maintain model libraries

Seniority

Senior, hands-on IC

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