功耗优化工程师/专家-AI创新业务
Core
Architecting and optimizing power consumption for smart hardware products across software, hardware, and system levels to ensure competitive battery life.
Role type
Senior IC power optimization engineer (smart hardware)
Builds
Smart hardware products with optimized power efficiency and battery life
Domain
Consumer electronics / Embedded systems / Power management
Required skills
SOC architecture and multi-core scheduling, Power Management IC (PMIC) design, CPU/GPU/DDR energy efficiency analysis, Embedded Linux/Android power management, Analog and digital circuit fundamentals, Power consumption modeling and scenario analysis, Hardware debugging and teardown, Wireless and multimedia data stream optimization
Preferred skills
Mobile or wearable product background, Mass production project experience, Audio/video/image processing data flow expertise
Technologies
Linux, Android, SOC, PMIC, CPU, GPU, DDR
Responsibilities
Decompose power consumption across hardware and software modules to define optimization targets; Analyze root causes of power issues and develop software/hardware solutions; Build and optimize power consumption models for product scenarios; Optimize hardware power design including power supply and board-level design; Develop and implement battery life improvement measures.
Seniority
Senior, hands-on IC
