Staff Digital Engineer
Core
Design complex Power Management IC (PMIC) chips for automotive applications, focusing on digital RTL design, integration, and mixed-signal design flow.
Role type
Staff Digital Engineer (IC Design)
Builds
Automotive PMIC products
Domain
Automotive semiconductor / Mixed-signal IC design
Deliverable
production ML models | product features
Required skills
Digital RTL design, Mixed-signal design flow, Timing constraints, Synthesis, P&R interaction, Timing analysis, LINT, CDC, SystemVerilog/Verilog, Behavioral modeling, Design documentation
Preferred skills
Conceptualizing robust designs, Cross-functional collaboration, Analytical problem solving
Technologies
Synopsys, Cadence, Mentor, Siemens
Responsibilities
Design digital RTL meeting timing/area/power specs, Integrate designs and run simulations, Participate in mixed-signal design flow (partitioning, synthesis, timing), Supervise P&R layout generation, Create test-benches and run gate-level simulations, Develop AMS/SystemVerilog behavioral models, Write design documents, Participate in design reviews
Seniority
Senior, hands-on IC