Staff Engineer, Performance Modelling
Core
Develop and maintain performance models for complex SoC designs using SystemC TLM 2.0 to optimize system efficiency and ensure successful product delivery.
Role type
Staff Engineer, Performance Modelling
Builds
High-performance System-on-Chip (SoC) designs for automotive, industrial, infrastructure, and IoT markets
Domain
Semiconductor / SoC Architecture / Performance Engineering
Deliverable
production ML models | product features
Required skills
SystemC TLM 2.0 modeling, SoC architecture analysis, performance simulation, bottleneck identification, cross-functional collaboration, technical mentorship
Preferred skills
Experience with DDR, CPU, GPU, and high-speed interfaces (PCIe, UCIe)
Technologies
SystemC, TLM 2.0, SoC simulators
Responsibilities
Develop and maintain performance models for SoC designs; Collaborate with architecture, design, software, and verification teams; Analyze and optimize system performance across components; Identify performance bottlenecks and propose solutions; Conduct performance simulations and provide detailed analysis; Mentor junior engineers in performance modelling techniques
Seniority
Staff, hands-on IC with mentorship responsibilities
