(Senior) ASIC Test Manager (m/f/d)
Core
Define and implement toplevel ATE test concepts and programs for analog, mixed-signal, and digital ASICs, ensuring high measurement accuracy and data integrity from development to series production.
Role type
Senior IC ASIC Test Manager
Builds
Scalable ATE test flows and test programs for wafer sort and final test
Domain
Semiconductor manufacturing / Automotive electronics
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
ATE test development & program architecture, DFT strategy and implementation, analog and mixed-signal circuit design and simulation, digital design and verification methodologies, semiconductor manufacturing processes and test flows, failure analysis, yield analysis, test optimization, product ramp-up support, silicon characterization across PVT
Preferred skills
Mentorship and team guidance, cross-functional collaboration in global environments
Technologies
ATE systems, bench/system-level test equipment
Responsibilities
Define and maintain ATE test programs for wafer and final test, debug HW/SW test issues, support production ramp and sustaining activities, architect scalable test concepts, validate test functionalities and drive cross-platform consistency, correlate bench and ATE test results, own silicon characterization across PVT, release test solutions to manufacturing
Seniority
Senior, hands-on IC
