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Technologist, RFIC Design Engineer

San Jose, CA, us💼 Full-time🗓 2026-07-20 → 2026-07-31

Core

Design of high performance RF and analog circuit blocks for storage systems powering hyperscale data centers and cloud platforms.

Role type

Senior IC RFIC Design Engineer

Builds

RF and analog integrated circuits (ICs) for data storage infrastructure

Domain

Semiconductor / RF & Analog IC Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

RF and analog integrated circuit design, full CMOS circuit design (amplifiers, mixers, converters, drivers, receivers, CDR, equalizers, power amplifiers), 40nm and below CMOS technology, EDA tools (Cadence, Mentor, Siemens, Ansys), analog layout (matching, EM-IR, SOA mitigation), floor planning, block and top-level chip routing, test plan preparation, reliability and yield assessment, silicon and application level bench evaluation

Preferred skills

Experience with distributed design teams

Technologies

Cadence, Mentor, Siemens, Ansys, 40nm and below CMOS

Responsibilities

Design transistor, block, and module level circuit architecture; perform simulation, optimization, and layout verification; prepare test plans; conduct reliability and yield assessment; correlate simulation to bench and bench to test; evaluate silicon and applications; document designs

Seniority

Senior, hands-on IC

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