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Staff RFIC Design Engineer

San Jose, CA, us💼 Full-time🗓 2026-07-06 → 2026-07-31

Core

Design of high performance analog and mixed-signal circuit blocks including transistor, block, and module level architecture, simulation, optimization, and layout verification.

Role type

Staff RFIC Design Engineer

Builds

High performance analog and mixed-signal integrated circuits for mass production

Domain

Semiconductor / RFIC / Analog & Mixed-Signal

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Analog and mixed-signal integrated circuit design, Full CMOS circuit design (Amplifiers, PMIC, Data converters), 40nm and below CMOS technology, EDA tools (Cadence, Mentor, Siemens, Ansys), Analog layout techniques (mismatch reduction, gradient suppression, parasitic minimization), Floor planning and chip routing, High performance deep CMOS analog reliability (EM-IR, SOA, VDR), Basic digital design flow

Preferred skills

Experience with distributed design teams

Technologies

Cadence, Mentor, Siemens, Ansys

Responsibilities

Transistor level, block level and module level circuit architecture and design, Simulation and optimization, Layout supervision and verification, Test plan preparation, Product characterization and reliability/yield assessment, Simulation to bench and bench to test correlation, Bench evaluation at silicon and application levels, Documentation

Seniority

Staff, hands-on IC

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