HPC High-Speed SerDes Interface Evaluation Leader
Core
Leading technical evaluation of high-speed SerDes interfaces (PCIe, CSI, DP, UCIe) for automotive SoCs to ensure signal quality and reliability.
Role type
Senior IC hardware evaluation engineer (SerDes/High-Speed Interfaces)
Builds
Automotive SoCs (R-Car series) and high-performance computing solutions
Domain
Automotive electronics, embedded semiconductors, high-speed digital interfaces
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
High-speed interface evaluation (SerDes, PCIe, UCIe), analog circuit knowledge (PLL, PHY, jitter, noise, SI/PI), root cause analysis, cross-functional technical leadership, English technical communication
Preferred skills
Oscilloscope/BERT/TDR usage, external IP vendor management, automotive SoC evaluation experience, Japanese communication
Technologies
PCIe, CSI, DP, UCIe, SerDes PHY, Oscilloscope, BERT, TDR
Responsibilities
Lead real-world and signal quality evaluations for high-speed interfaces, define evaluation specifications and methodologies, coordinate with design teams and IP vendors for issue resolution, lead global evaluation teams across Japan, India, and Vietnam
Seniority
Senior, hands-on IC
