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High-Speed I/F Subsystem Design Engineer

Kodaira, jp💼 Full-time🗓 2026-04-02 → 2026-07-31

Core

Lead technical execution of high-speed SerDes interface evaluation for automotive SoCs (R-Car series), ensuring quality through silicon/board-level testing and signal integrity verification.

Role type

Senior IC high-speed interface evaluation engineer

Builds

Automotive SoCs (R-Car series) with high-speed interfaces like PCIe, CSI, DP, UCIe

Domain

Automotive semiconductor / High-speed digital interfaces

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

High-speed SerDes interface evaluation, Root-cause analysis, Signal integrity assessment, Stress testing, Analog behavior knowledge (PLL/PHY, jitter, noise), Technical leadership

Preferred skills

High-speed measurement tools (oscilloscopes, BERT, TDR), IP vendor coordination, Automotive SoC evaluation experience

Technologies

PCIe, CSI, DP, UCIe, SerDes PHY, Oscilloscopes, BERT, TDR

Responsibilities

Lead technical execution of high-speed SerDes interface evaluation, Drive silicon/board-level testing and signal integrity assessment, Define evaluation strategy and consolidate results, Coordinate triage and root-cause investigation with design teams and vendors, Provide technical leadership to evaluation members

Seniority

Senior, hands-on IC

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