SOC验证（CPU芯片） - 芯片研发
Core
Build and maintain UVM verification environments for data center CPU chips, executing test plans covering performance, power, RTL/FW, and GTL simulations.
Role type
Senior SOC verification engineer (CPU)
Builds
Data center CPU chips for storage, network, and server business
Domain
Semiconductor / CPU architecture
Required skills
UVM, SystemVerilog, Makefile, Perl, Python, C/C++, RISC-V/ARM architecture, AMBA4/5 protocol
Preferred skills
CXL, CCIX interconnect protocols
Technologies
UVM, SystemVerilog, Makefile, Perl, Python, C/C++, RISC-V, ARM, AMBA4, AMBA5, CXL, CCIX
Responsibilities
Build UVM environments, execute test plans for performance/power/RTL/FW/GTL, assist design teams in debugging and improving verification flows
Seniority
Senior, hands-on IC
