CareerPlan

ML Silicon Performance Lead

San FranciscoFull-time2026-11-03 → 2026-11-09
U.S. persons only (export control)

Core

Drive hardware/software co-design for AI-native silicon to maximize performance, efficiency, and scalability for frontier AI models.

Role type

Senior IC ML Silicon Performance Lead

Builds

AI-native silicon chips, system-level solutions, and specialized acceleration IP for OpenAI's supercomputing platform

Domain

AI Hardware / Silicon Architecture / Machine Learning

Deliverable

production ML models

Required skills

ML accelerator architecture, hardware/software co-design, kernel optimization, performance modeling and simulation, quantization and numerical formats, data movement and memory hierarchy analysis, specialized IP definition

Preferred skills

Experience with compiler teams, model-to-hardware mapping, validation of performance assumptions

Technologies

ML kernels, compilers, silicon architecture, quantization formats, performance simulators

Responsibilities

Drive hardware/software co-design across ML research, compiler, and silicon teams; Map and optimize ML kernels for architecture; Co-design support for new data structures and quantization formats; Define and develop specialized acceleration IP; Drive ML performance modeling and simulation; Partner with Silicon Architecture lead to specify and validate new IP