Staff Analogue Designer, CMOS Modelling
Core
Own full-chip mixed-signal CMOS modelling and behavioural model development for cryo-CMOS ASICS controlling trapped-ion quantum processors.
Role type
Staff Analogue Designer (CMOS Modelling)
Builds
Behavioural models (Verilog-A, Verilog-AMS, real-number) for full-chip simulation and verification of quantum processor control ICs.
Domain
Quantum Computing / Cryo-CMOS / Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> production IC models & verification flows
Required skills
Full-chip mixed-signal design, Verilog-A/AMS, real-number modelling (SystemVerilog nettype/UDN), first-principles mathematics derivation, model-schematic correlation, mixed-signal co-simulation, extreme-environment silicon experience
Preferred skills
Production tapeout flow experience, linear systems/Laplace/z-domain analysis, noise and non-linearity expertise, MATLAB/Python/NumPy for validation
Technologies
Verilog-A, Verilog-AMS, SystemVerilog, Cadence Virtuoso, Spectre, Xcelium, AMS Designer, MATLAB, Python, NumPy
Responsibilities
Define full-chip modelling strategy, architecture, and sign-off criteria; Develop Verilog-A/AMS models for analogue blocks; Build real-number models for digital verification; Derive models from mathematical equations; Run model-versus-schematic correlation; Stand up mixed-signal co-simulation and regression; Mentor engineers on modelling craft
Seniority
Staff, hands-on IC design & methodology leadership
