Senior/Principal Design Automation Engineer, Simulation
Core
Develop, optimize, and implement build verification flows and AI-assisted automation for circuit simulation and verification in HBM and DRAM development.
Role type
Senior/Principal IC design automation engineer (simulation)
Builds
Scalable software, automation, and AI-driven workflows for semiconductor design verification
Domain
Semiconductor / Memory (HBM, DRAM) / EDA
Deliverable
production ML models
Required skills
Analog circuit simulation (FineSim, PrimeSim, XA, Spectre, VCS, Xcelium), Custom IC design platforms (Cadence Virtuoso, Synopsys Custom Compiler), Python, Linux, shell scripting, Tcl, Cadence SKILL, CMOS concepts, EM/IR analysis, Static Timing Analysis (STA)
Preferred skills
AI-enabled methodologies for simulation/verification, Parasitic extraction (StarRC, Quantus), Object-oriented programming
Technologies
FineSim, PrimeSim, XA, Spectre, VCS, Xcelium, Cadence Virtuoso, Virtuoso-L, Virtuoso-XL, Synopsys Custom Compiler, StarRC, Quantus
Responsibilities
Collaborate with memory design teams to optimize EDA tools and simulation flows; Build and develop scalable software and automation; Partner with EDA vendors to integrate new tools; Lead development of AI-assisted automation for simulation workflows
Seniority
Senior/Principal, hands-on IC
