Expert Logic Design Engineer
Core
Lead the architecture, design, and optimization of next-generation FPGA and ASIC-based control platforms for quantum computing systems.
Role type
Senior IC logic design engineer (FPGA/ASIC)
Builds
Proprietary digital IP and high-performance control platforms for quantum systems
Domain
Quantum computing hardware and semiconductor design
Required skills
SystemVerilog RTL design, FPGA/ASIC architecture, static timing analysis (STA), clock-domain crossing (CDC), digital IP development, hardware-software interface design, verification strategy definition, PPA optimization
Preferred skills
AMD Versal FPGA, Vivado, Synopsys VCS, Siemens Questa, ASIC design flow, DSP pipelines, high-speed interfaces (AXI, PCIe, DDR), Python/Tcl for EDA automation, quantum computing background
Technologies
SystemVerilog, FPGA, ASIC, AMD Versal, Vivado, VCS, Questa, AXI, PCIe, DDR
Responsibilities
Lead architecture and RTL implementation of complex digital subsystems; Design and optimize ultra-low-latency digital logic; Drive end-to-end digital IP development; Optimize timing, latency, resource utilization, and power efficiency; Address timing closure and synchronization challenges; Define hardware-software interfaces; Collaborate with verification engineers on functional coverage; Review RTL designs and provide technical guidance.
Seniority
Senior, hands-on IC
