Master Thesis - PCB Optimization for AI Power Supply Topologies (f/m/div)
Core
Investigate parasitic impedance in test-board layouts, develop a Design-for-Test circuit, and optimize PCB layouts to reduce switching noise in power converters.
Role type
Master thesis researcher (power electronics)
Builds
DfT test circuits and optimized PCB layouts for power-circuit validation
Domain
Automotive and industrial power electronics
Required skills
PCB design and layout, circuit simulation, reading electronic schematics, measurement of self-inductance and signal integrity
Preferred skills
Previous experience in PCB design and layout
Technologies
PCB design tools, circuit simulation software
Responsibilities
Develop a DfT test circuit for precise impedance measurements, perform targeted measurements of self-inductance and signal integrity, design and evaluate a power-converter test board, propose optimized PCB layouts to reduce switching noise, validate results by comparing measurements with simulations
Seniority
Master student researcher
