Senior Staff Engineer Radio Frequency Design (f/m/div)
Core
Define and evaluate RF Digital PLL concepts and architectures, develop behavioral models, design high-performance RF/mixed-signal circuits, and architect digital calibration algorithms for high-frequency wireless applications.
Role type
Senior Staff Engineer, RF Design (IC)
Builds
High-performance RF PLLs and transceiver architectures for wireless applications
Domain
Semiconductor / RF / Microwave Engineering
Required skills
RF Digital PLL architecture, Behavioral modeling (MATLAB, Simulink, Verilog-A), RF Circuit Design (VCO, Dividers, PFD, Charge Pump), CMOS/BiCMOS, Noise analysis (Phase Noise, Jitter), System partitioning, Layout guidance, Silicon characterization
Preferred skills
German language proficiency
Technologies
Cadence Spectre/SpectreRF, GoldenGate, MATLAB, Simulink, Verilog-A
Responsibilities
Define and evaluate RF Digital PLL concepts and architectures; Develop high-level behavioral models to analyze and optimize RF PLL loop dynamics; Translate concepts into high-performance RF and mixed-signal circuits; Architect and verify digital calibration algorithms for PLL; Partner with system architects to optimize mixed-signal and RF system partitioning; Guide layout engineers and support silicon characterization and debugging
Seniority
Senior Staff, hands-on IC with leadership