Staff Engineer
Core
Develop and execute semiconductor test solutions for RF, connectivity, and IoT products using Teradyne UltraFLEX platforms, focusing on silicon bring-up, characterization, production testing, and yield improvement.
Role type
Senior IC semiconductor test engineer (ATE/DFT)
Builds
Scalable test solutions for volume manufacturing of SoC connectivity products
Domain
Semiconductor industry, RF, IoT, and connectivity
Required skills
ATE test development, DFT methodologies (ATPG, PMU, BUCLK, LDOs, trimming), Teradyne UltraFLEX platforms, Perl, Python, C, C++, Java, Visual Basic, UNIX/Linux environments, shell scripting, analog/digital circuit theory, SoC validation
Preferred skills
UltraFLEX+ experience, offshore manufacturing coordination, continuous improvement in test coverage and yield
Technologies
Teradyne UltraFLEX, Perl, Python, C, C++, Java, Visual Basic, UNIX/Linux
Responsibilities
Develop and debug ATE test programs for SoC connectivity products; perform silicon bring-up and characterization; optimize production test programs for high-volume manufacturing; collaborate with cross-functional teams including IP Design and DFT; drive continuous improvements in test coverage and yield
Seniority
Senior, hands-on IC