ASIC Design Verification Intern
On-site
Core
Manage analog IP pre and post layout verification, simulation, specification, and documentation for semiconductor chips.
Role type
ASIC Design Verification Intern
Builds
Analog IP blocks and system verification environments
Domain
Semiconductor / Analog IC Design
Required skills
EDA tools (Cadence, Synopsis, Mentor, Spectre/HSPice), Analog design concepts (Bandgap, Voltage Regulator, Delta Sigma ADC, Oscillator, PLL), Behavioral modeling, Test bench creation, Simulation, Documentation
Preferred skills
AI expertise
