Digital Verification Engineer
Core
Lead verification activities for ARM-based SoCs, developing test benches, components, and test cases to ensure zero-defect delivery of complex semiconductor IP and subsystems.
Role type
Senior IC Digital Verification Engineer (SoC)
Builds
Verification test benches, components (drivers, monitors, checkers), and simulation cases for standalone IPs, subsystems, and full SoCs.
Domain
Semiconductor / Hardware Design / SoC Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM/OVM, System Verilog, VHDL/Verilog, C, Python, Perl, RTL code analysis, assertion coverage analysis, debug and root cause analysis, gate-level simulation, multi-core SoC architecture, AMBA bus protocols (AXI, AHB, APB), NIC/FlexNOC, memory subsystems (DDR3/LPDDR4/Flash), communication protocols (CAN, PCIe, MIPI, Ethernet, USB), simulation tools (Xcelium, VCS, Questasim), regression planning tools (VManager), defect/version management tools.
Preferred skills
Low Power intent verification (CPF, UPF), Assertion-based verification.
Responsibilities
Lead complete ARM-based SoC level verification activities; develop verification test benches and components; create direct and constrained-random stimulus; perform gate-level simulations and debugging; debug test patterns for verification and automatic testers; continuously improve verification methods, tools, and flows with EDA partners.
Seniority
Senior, hands-on IC
