Senior Post-Silicon Validation Engineer
Core
Own silicon bring-up, characterization, and system-level validation of complex mixed-signal SoCs to enable product integration.
Role type
Senior hands-on IC post-silicon validation engineer
Builds
Test and validation lab infrastructure, automated characterization environments, and validation strategies for high-power satellite SoCs
Domain
Aerospace / Satellite hardware / Mixed-signal SoC validation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> infrastructure (validation lab & automation)
Required skills
Post-silicon validation strategy, SoC bring-up, mixed-signal SoC/ASIC characterization, lab test equipment operation, hardware/software debug, Python scripting, embedded C/C++, JTAG/SPI/UART debugging
Preferred skills
RF SoC characterization, ADC/DAC/PLL/RF transceiver validation, high-speed SerDes/JESD validation, FPGA prototyping, RISC-V/ARM SoC experience
Technologies
Python, C/C++, JTAG, SPI, UART, Oscilloscopes, Spectrum analyzers, Vector signal generators, Network analyzers, Logic analyzers, Power supplies
Responsibilities
Define and execute post-silicon validation strategy and readiness criteria; Lead first silicon bring-up across power, clocks, debug interfaces, and subsystems; Build test lab infrastructure and automated regression environments; Partner with RF/analog teams on characterization of RF chains, PLLs, and power; Drive cross-functional debug across silicon, firmware, RTL, and system boundaries; Build reusable automation for data collection and analysis; Correlate measured DSP/calibration performance with models.
