Staff Engineer, Emulation Technical Lead
Core
Leading technical strategy and execution for high-performance CPU emulation infrastructure to enable silicon bring-up, validation, and customer-ready AI systems.
Role type
Staff Engineer, Emulation Technical Lead
Builds
High-performance emulation infrastructure for RISC-V CPUs and AI platforms
Domain
Semiconductor hardware design, CPU verification, emulation, AI compute
Deliverable
production ML models | infrastructure
Required skills
CPU verification, emulation, debug, Verilog, SystemVerilog, SoC design, cross-functional collaboration, technical leadership, mentoring
Preferred skills
Zebu emulation platforms experience
Technologies
Verilog, SystemVerilog, Zebu, RISC-V
Responsibilities
Lead technical strategy to scale and optimize emulation infrastructure on commercial and open-source platforms; Enable emulation infrastructure and workflow including producing reliable builds; Drive complex cross-functional debug and root cause analysis efforts; Optimize emulation performance and regression flows with Design Verification teams and tool vendors
Seniority
Staff, hands-on IC with leadership
