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PCB Layout Engineer

Santa Clara💼 Full-time💰 $100,000–$100,000🗓 2026-07-28 → 2026-09-26

Core

Designing multi-layer PCB layouts for high-performance computing and AI hardware, ensuring signal integrity and manufacturability for mass production.

Role type

Senior IC PCB Layout Engineer

Builds

High-speed interface boards (GDDR, DDR, PCIe Gen 5/6, Ethernet, USB) for data centers, workstations, and consumer computing.

Domain

Semiconductor hardware / High-performance computing / AI infrastructure

Deliverable

production ML models | product features

Required skills

Multi-layer board layout, HDI vias, blind/buried vias, back drilling, DFM/DFA, high-speed interface routing, floorplanning, power/ground plane creation, stackup design, Cadence Allegro/Pulse proficiency

Preferred skills

Altium experience, RISC-V architecture knowledge

Technologies

Cadence Allegro, Cadence Pulse, v25.1

Responsibilities

Define and apply layout rules for high-speed designs, collaborate with power/signal integrity/mechanical teams, resolve fabricator feedback, optimize for performance and cost

Seniority

Senior, hands-on IC

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