SOC Emulation Engineer - Hardware Emulation Infrastructure
Core
Integrating vendor and custom hardware transactors into RTL testbenches and developing Python-based test frameworks to support hardware emulation infrastructure and internal chip design teams.
Role type
Junior-to-mid level SOC Emulation Engineer
Builds
Python APIs and CMake-based compilation flows for emulation libraries
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Python for automation and test development, C++, SystemVerilog RTL navigation, clock domain and tri-state resolution handling, standard chip interfaces and bus protocols knowledge, hardware synchronization (resets/clocking) understanding
Preferred skills
Modern AI tools usage (Claude, ChatGPT, Copilot), pybind11 API development, large-scale emulation build and run tooling optimization
Technologies
Python, C++, SystemVerilog, pybind11, CMake, Synopsys Zebu
Responsibilities
Integrate vendor and custom transactors into RTL testbenches, build and maintain Python APIs and CMake compilation flows, triage and debug full stack issues from Python tests to hardware, support emulation users across multiple chip projects
Seniority
Junior-to-mid level, hands-on IC
