Principal Engineer - Validation Engineering
Core
Define and lead validation strategies for next-generation rack-scale AI connectivity products, ensuring reliable performance in demanding environments.
Role type
Principal Hardware Validation Engineer
Builds
Next-generation connectivity products (CXL, Ethernet, NVLink, PCIe, UALink) for hyperscalers and data center customers
Domain
Semiconductor hardware, high-speed connectivity, AI infrastructure
Required skills
Validation strategy planning, silicon/board/system bring-up, automated test framework architecture, root-cause analysis, cross-functional technical leadership, Python scripting, Linux environment management, high-speed interface debugging
Preferred skills
Master's/PhD in EE/CE, high-speed interface validation (PCIe, CXL, Ethernet), physical-layer fundamentals, signal integrity, protocol analysis, compliance testing, Azure DevOps proficiency, lab scaling experience
Technologies
Python, Linux, Microsoft Azure DevOps, PCIe, CXL, Ethernet, NVLink, UALink
Responsibilities
Define validation methodologies, coverage goals, and exit criteria; Architect scalable lab infrastructure and automated test frameworks; Drive root-cause analysis across hardware, firmware, and software boundaries; Mentor engineers and establish validation best practices; Partner with design and product teams to resolve issues and deliver releases; Represent validation status in design and launch reviews
Seniority
Principal, hands-on IC with strategic influence
