Tech Lead PCB Layout Engineer
Core
Designing complex, high-density PCB layouts for rack-scale AI infrastructure connectivity products.
Role type
Tech Lead PCB Layout Engineer
Builds
Custom connectivity solutions for hyperscalers and AI/ML applications
Domain
Semiconductor hardware, AI infrastructure, high-speed interconnect
Deliverable
production ML models | product features
Required skills
High-speed differential pair design, RF design, high-power design, high-density interconnect (HDI) design, signal integrity analysis, power integrity analysis, DFT implementation, DFM implementation, full PCB design lifecycle management, cross-functional system design, independent problem solving, PCB/PCBA engineering qualification handling
Preferred skills
Customer oversight, fluent English communication
Technologies
Cadence Allegro, Polar SI9000, CAM350, AutoCAD
Responsibilities
Design complicated PCB layouts across high-speed interfaces, power, and high-density interconnect fields; execute full PCB design process from feasibility study to DFM and Gerber release; solve signal integrity, power integrity, DFT, and DFM problems independently; collaborate with electrical design community on system development; handle PCB/PCBA engineering qualification (EQ)
Seniority
Senior, hands-on IC with leadership responsibilities
