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Hardware Machine Learning Engineer

Chicago, United States; New York, United States💼 Full-time💰 $200,000–$200,000🗓 2026-06-09 → 2026-07-31

Core

Architect and co-design machine learning models for custom hardware, optimizing inference for latency and resource constraints in high-frequency trading environments.

Role type

Senior IC hardware machine learning engineer

Builds

Custom ML inference solutions deployed on FPGAs and ASICs for trading systems

Domain

Financial technology / Hardware acceleration

Deliverable

production ML models

Required skills

Hardware design trade-offs (pipelining, fixed-point arithmetic), VHDL/SystemVerilog, HLS, ML-to-hardware frameworks (hls4ml, FINN, Vitis AI), neural network architectures, inference optimization, quantization, Python, C++

Preferred skills

ML compiler infrastructure (MLIR, TVM, XLA), latency-sensitive systems background, functional verification (UVM, Cocotb)

Technologies

FPGAs, ASICs, PyTorch, TensorFlow, Python, C++, VHDL, SystemVerilog, HLS, hls4ml, FINN, Vitis AI, MLIR, TVM, XLA, UVM, Cocotb

Responsibilities

Architect and co-design ML models with traders and researchers treating hardware constraints as first-class inputs; Shape custom hardware roadmap by translating ML requirements into architectural decisions; Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept to production; Track and evaluate emerging research in neural architecture search and quantization to determine measurable system improvements

Seniority

Senior, hands-on IC

Rewrite
## Responsibilities - Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints (latency budgets, resource limits, numerical precision) as first-class design inputs - Shape our custom hardware roadmap by translating ML model requirements into concrete architectural decisions - Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production - Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems ## Requirements - Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs - Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI - Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow - Proficiency in Python, C++, or similar languages for tooling, testing, and simulation - Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams ## Nice to Have - Exposure to ML compiler infrastructure such as MLIR, TVM, XLA, or similar tools for lowering and optimizing models for hardware targets - Background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, real-time signal processing, or similar domains - Familiarity with functional verification methodologies (for example SystemVerilog, UVM, Cocotb) - Advanced degree (MS or PhD) in EE, CS, Physics, or related field, or equivalent depth through industry or research experience ## Benefits - Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance.
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