Hardware Machine Learning Engineer
Core
Architect and co-design machine learning models for custom hardware, optimizing inference for latency and resource constraints in high-frequency trading environments.
Role type
Senior IC hardware machine learning engineer
Builds
Custom ML inference solutions deployed on FPGAs and ASICs for trading systems
Domain
Financial technology / Hardware acceleration
Deliverable
production ML models
Required skills
Hardware design trade-offs (pipelining, fixed-point arithmetic), VHDL/SystemVerilog, HLS, ML-to-hardware frameworks (hls4ml, FINN, Vitis AI), neural network architectures, inference optimization, quantization, Python, C++
Preferred skills
ML compiler infrastructure (MLIR, TVM, XLA), latency-sensitive systems background, functional verification (UVM, Cocotb)
Technologies
FPGAs, ASICs, PyTorch, TensorFlow, Python, C++, VHDL, SystemVerilog, HLS, hls4ml, FINN, Vitis AI, MLIR, TVM, XLA, UVM, Cocotb
Responsibilities
Architect and co-design ML models with traders and researchers treating hardware constraints as first-class inputs; Shape custom hardware roadmap by translating ML requirements into architectural decisions; Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept to production; Track and evaluate emerging research in neural architecture search and quantization to determine measurable system improvements
Seniority
Senior, hands-on IC
