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Firmware Engineer Tech Lead

San Jose💼 Full-time💰 $160,000–$160,000🗓 2026-07-28 → 2026-09-26

Core

Architect and develop firmware and microcontroller subsystems for Astera Labs' SoC and systems products, implementing major differentiating features for rack-scale AI infrastructure.

Role type

Senior Firmware Engineer Tech Lead

Builds

Firmware for SoC and systems products, SDKs for system management controllers

Domain

AI Infrastructure, Semiconductor Connectivity (CXL, Ethernet, NVLink, PCIe, UALink)

Deliverable

production ML models | product features

Required skills

C/C++ development, Python scripting, SoC architecture, HW-SW interface design, PCIe protocol debugging, embedded firmware development, SDK creation, build environment management (gcc/Make/Doxygen/GitHub)

Preferred skills

PAM4 SerDes expertise, Tx/Rx equalization, CDR, SerDes link budgets, embedded firmware for Ethernet Switch products

Technologies

C, C++, Python, gcc, Make, Doxygen, GitHub, PCIe, CXL, NVLink, UALink, BMC

Responsibilities

Architect and develop firmware for SoC and microcontroller subsystems, implement differentiating product features, collaborate with logic designers on HW-SW interfaces, debug protocol issues using analyzers and exercisers, develop C-based SDKs for system management controllers

Seniority

Senior, hands-on IC with technical leadership

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