Firmware Engineer, Staff
Core
Lead firmware architecture, development, integration, and bring-up for SERDES PHY portfolio from RTL/Digital design to post-silicon validation.
Role type
Staff Firmware Engineer (Semiconductor/PHY)
Builds
SERDES PHY chips for AI data centers and high-speed communication systems
Domain
Semiconductor, High-Speed Interfaces, AI Infrastructure
Required skills
C/C++, Python, Embedded Systems (ARM/RISCV/MIPS), Bare Metal Programming, Device Drivers, HDL (Verilog/SystemVerilog), EDA Tools, SerDes/Ethernet/PCIe/UCIe, FPGA/SoC/MCU Validation, High-Speed Signal Debugging
Preferred skills
Embedded Linux (Buildroot/Yocto), RTOS (Zephyr/FreeRTOS), Hardware Validation (Power/SI/EMC), Jira/Agile/Scrum
Technologies
C, C++, Python, Verilog, SystemVerilog, ARM, RISCV, MIPS, FPGA, SoC, MCU, DSP, JTAG, Oscilloscope, I2C, SPI, PCIe, USB, NVMe, DDR, Ethernet, MIPI, CSI, GMSL, A2B, I2S, TDM, LVDS, CAN, Buildroot, Yocto, Zephyr, FreeRTOS, Xilinx, Zed, MicroZed
Responsibilities
Gather requirements and develop device interface functions; Collaborate with ASIC/Digital Design/Verification teams to meet performance goals; Translate requirements into efficient C/C++ firmware code; Oversee firmware lifecycle from pre-silicon to post-silicon validation; Develop test cases and debug tools for hardware design decisions; Mentor junior engineers and drive multi-functional teams to resolve integration challenges; Debug and root cause low-level SW, silicon, and HW issues; Work with external vendors to ensure high-quality releases.
