Sr. Principal Program Manager, ASIC Design
Core
Own cross-functional execution framework for advanced ASIC programs from early planning through tapeout, driving milestones, dependencies, and risk management across multiple engineering teams.
Role type
Sr. Principal Program Manager, ASIC Design
Builds
Custom connectivity solutions and standards-based silicon architectures for AI infrastructure
Domain
Semiconductor / ASIC Design / AI Infrastructure
Deliverable
production ML models | product features | infrastructure
Required skills
ASIC/SoC development lifecycle management, pre-silicon tapeout execution, cross-functional program leadership, risk mitigation, EDA flow management, IP integration, foundry dependency management, pre-silicon validation platforms
Preferred skills
High-speed connectivity expertise (SerDes, PHY, PCIe, CXL, Ethernet), AI infrastructure silicon experience, trade-off analysis across performance/power/area/cost
Technologies
CXL, Ethernet, NVLink, PCIe, UALink, FPGA, EDA tools, PDK, GDS
Responsibilities
Lead pre-silicon execution of complex ASIC programs from concept through tapeout; Own program plans, schedules, milestones, and risk registers; Drive cross-functional alignment across architecture, RTL, verification, DFT, physical design, and IP; Identify execution risks and drive trade-off decisions; Establish scalable program management practices and operating rhythms
Seniority
Principal, hands-on IC program leadership
