Principal Signal and Power Integrity Engineer
Core
Execute SI planning, design, modeling, simulation, and lab validation for rack-scale AI infrastructure connectivity products.
Role type
Principal Signal and Power Integrity Engineer
Builds
High-speed connectivity solutions (CXL, Ethernet, NVLink, PCIe, UALink) for AI/ML data centers
Domain
Semiconductor hardware, high-speed interconnects, AI infrastructure
Deliverable
production ML models | product features
Required skills
High-speed SI/PI design, 2D/3D EM simulation, SERDES channel simulation, equalization, PCB fabrication trade-offs, root cause analysis, hardware system constraint definition
Preferred skills
Master's degree, tech lead experience, cross-functional design leadership
Technologies
Cadence, Ansys, ADS, VNA, TDR, oscilloscopes
Responsibilities
Define hardware system constraints and high-speed technology roadmaps, lead root cause and correction action teams, collaborate with electrical design community, perform lab validation with various system configurations
Seniority
Principal, hands-on IC
