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Principal Emulation Engineer

San Jose💼 Full-time💰 $209,000–$209,000🗓 2026-07-28 → 2026-09-26

Core

Design and verify hardware-software interfaces on complex SoCs by creating emulation environments to stress test ASICs and debug design, environment, transactor, and code issues.

Role type

Principal Emulation Engineer

Builds

Complex SoC/silicon products for Server, Storage, or Networking applications

Domain

Hardware verification, emulation, and semiconductor connectivity

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

System Verilog, emulation environment creation, hardware-software interface verification, protocol knowledge (PCIe, Ethernet, DDR, NVMe, SPI, I2C/I3C), scripting (Perl/Python/C), software-hardware co-simulation debugging

Preferred skills

Emulation/prototyping technologies (Palladium/Zebu/Veloce/HAPS), FPGA prototyping, non-UVM modeling

Technologies

System Verilog, UVM, Palladium, Zebu, Veloce, HAPS, FPGA, PCIe, Ethernet, DDR, NVMe, SPI, I2C, I3C

Responsibilities

Architect and verify hardware-software interfaces on complex SoCs, create environments to enable verification teams to stress test ASICs, debug design and environment issues, work with logic designers to specify interfaces

Seniority

Principal, hands-on IC with strategic oversight

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