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Senior SoC Verification/Validation Engineer

San Jose💼 Full-time💰 $165,000–$165,000🗓 2026-07-28 → 2026-09-26

Core

Validating complex SoCs for AI connectivity and cloud infrastructure on emulation platforms to ensure functionality and performance pre-silicon tape-out.

Role type

Senior SoC Verification/Validation Engineer

Builds

High-speed serial interfaces (PCIe, Ethernet, UALink) and overall SoC functionality

Domain

Semiconductor hardware design, AI connectivity, cloud infrastructure

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Pre-silicon verification/validation, high-speed protocol debugging (PCIe, UALink, Ethernet), System Verilog, C/C++, Python, emulation platform debugging

Preferred skills

Palladium or Zebu emulation platform experience, advanced SoC simulation debugging

Technologies

System Verilog, C/C++, Python, PCIe, UALink, Ethernet, Palladium, Zebu

Responsibilities

Develop C/C++ firmware and tests to validate and execute test plan items; Build tools and methodologies to validate and debug HW and SW/FW issues on the emulation platform; Collaborate with Architecture, Design, Verification, and SW/FW teams to define and execute functional/performance validation plans

Seniority

Senior, hands-on IC

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